Low source impedance voltage regulator



INVEN'IOR.

ARTHUR I... KEMPEF? ATTO EV AQL'. KEMPER 3,513,378 Low souncn IMPEDANCE VOLTAGE mam/won Filed Oct. 30. 1967 Uni'ted States Patent 3,513,378 LOW SOURCE IMPEDANCE VOLTAGE REGULATOR Arthur L. Kemper, Marion, Iowa, assignor to Collins Radio Company, Cedar Rapids, Iowa, a corporation of Iowa Filed Oct. 30, 1967, Ser. No. 679,270 Int. Cl. G051? 1/58 U.S. Cl. 323-9 2 Claims ABSTRACT OF THE DISCLOSURE A low source impedance voltage regulator with at least two transistors or their functional equivalent With the base of one transistor receiving its bias voltage from the emitter output of another transistor and with the base of the transistor developing an emitter output connected to the collector of the other transistor. This interconnection of the transistors along with biasing circuitry provides bias voltages developed from the emitter output being 180 out of phase with variations in voltage applied to the collector base connection between transistors and thereby an amplified voltage regulation corrective action. A third transistor with bias developing circuitry added in one embodiment provides short circuit proof circuit protection through a current limiting gating action as higher load currents are drawn.

This invention relates in general to transistor equipped voltage regulators, and in particular, to a voltage regulator circuit providing a closely regulated DC output as a supply having a very low source impedance, and with output ripple rejection approximately 70 to 75 db down from the injected ripple.

Various Zener diode and transistor equipped voltage regulators of the art are subject to excessive undesired variance in the regulated DC output with load current change demands extending through any material range since most voltage regulators as a voltage supply have a higher source impedance than desirable. Further, input line voltage ripple can be a particularly troublesome problem that is difficult to suppress or filter out leading in many instances to involved filter circuits and/or an inefficient input power to regulated DC voltage output power transformation ratio.

It is, therefore, a principal object of this invention to provide a voltage regulator having a closely regulated DC output, and as a supply having very low source impedance.

Another object is to provide such a voltage regulator with ripple rejection down by as much as, for example, 70 to 75 db from the injected ripple.

A further object is to provide such a voltage regulator with circuit provisions insuring that the regulator be substantially short circuit and burn out proof with maximum current limits even with a direct short, and with no fuse required.

Features of this invention useful in accomplishing the above objects include, in a voltage regulator, a transistor and a Zener diode with the transistor having a collector connected to one terminal of the main input voltage supply, the emitter connected to the output load, and the base connected to the collector of a second transistor and through the collector emitter circuit path of the second transistor to ground. A resistor connected to the positive terminal of the main voltage supply is connected at the other end to the cathode of the Zener diode and to a capacitor connected in parallel to the other (ground) terminal of the main voltage supply. This provides for a statbilized and filtered DC voltage, 20 volts DC, for example, applied through a resistor to the common junction of the base of the first transistor and the collector of the second transistor. The base of the second transistor receives its bias voltage from the emitter output of the first transistor and with variations in this bias voltage being 180 out of phase with variations in voltage applied to the collector of the second transistor, any change in the DC output voltage of the first transistor is amplified by the second transistor and fed back to the base of the first transistor. This corrects regulated output change with the feedback loop including a resistive impedancev Further, the base of the second transistor is AC coupled through a capacitor to the emitter output of the first transistor in order to have a corrective action virtually cancelling any line ripple voltage or AC voltages appearing in the output due to load changes or for any other reason. An additional feature is short circuit proof protecting the circuit through the addition of a third transistor and related circuitry acting as a current limiting gate for the regulator.

Specific embodiments representing what are presently regarded as the best modes of carrying out the invention are illustrated in the accompanying drawing.

In the drawing:

FIG. 1 represents a schematic of a transistor equipped voltage regulator having very low source impedance as a DC supply and with output ripple rejection being adjustable to as low as 70 to db down from injected ripple; and

FIG. 2, a schematic of another transistor equipped voltage regulator embodiment with circuit elements added for making the regulator circuit substantially short circuit and burn out proof.

Referring to the drawing:

In the voltage regulator 10 of FIG. 1, the input terminals 11a and 1112 are interconnected by a resistor 12 connected to the terminal 11a and, at its other end, through Zener diode 13 and capacitor 14 in parallel to the terminal 1117. An NPN transistor 15 is provided with its collector connected to the input terminal 11a and its emitter connected to output terminal 16a, and a load may be connected, as indicated by resistance R between the output terminals 16a and 16b. The base of NPN transistor 15 is connected to the collector of NPN transistor 17 and through the collector emitter circuit of transistor 17 to the input terminal 11b. Please note that the stabilized and filtered voltage developed at the cathode of Zener diode 13 and at the common junction of resistor 12, Zener diode 13 and the capacitor 14 is applied through resistor 18 to the common junction of the base of transistor 15 and the collector of transistor 17. The capacitor 19 connected between the common junction of the base of transistor 15 and the collector of transistor 17 and the base of transistor 17 is provided to counter any tendency toward high frequency oscillations in the voltage regulator. A bias resistor subcircuit 20 including resistor 21 connected at one end to input terminal 11b and output terminal 161; or ground and at the other end through resistor 22 and a thermistor 23 in parallel to the base of transistor 17, with thermistor 23 acting in the circuit to stabilize output voltage with temperature variations. An adjustable resistor 24 and a capacitor 25 are connected in parallel between the emitter output of transistor 15 and the base of transistor 17. An additional capacitor 26 is provided in the circuit connected between the emitter output of transistor 15 and the line interconnecting input terminal 11b and output terminal 16b, shown to be ground, in order to provide a small amount of additional filtering and to add further stability to the circuit.

In operation of the voltage regulator 10 since the base of transistor 17 receives its bias voltage from, and as determined by, the emitter output of transistor 15, and particularly since the collector voltage of transistor 17 is out of phase with the base voltage applied thereto, any change in the DC emitter output voltage of transistor 15 is amplified by transistor 17 and applied back to the base of transistor 15 in correcting for emitter output voltage variation or change from transistor 15. The capacitor 25 is an AC coupling from the emitter output of transistor 15 to the base of transistor 17 to thereby provide that line ripple voltage from injected ripple or AC voltages due to load changes tending to appear at the emitter of transistor 15 being virtually cancelled in the output circuit. This provides, via this corrective action in the voltage regulator effectively very low source impedance within the operational range of current loading consistent with maintained voltage regulation. The degree of ripple rejection obviously varies with the frequency of the injected ripple, the size of capacitors 14, 25 and 26, and the beta values of the transistors and 17. However, output ripple rejection in the order of 70 to 75 db down from the injection ripple is easily obtainable. Resistor 24, shown as an adjustable resistor although it could be a selected value resistor, adjusts the regulated output voltage level and is normally set to the highest DC output than can be obtained consistent with desired line ripple attenuation. Stated another way, larger ripple voltages on the collector of transistor 15 will result in lower regulated output voltages with acceptable ripple attenuation in the output. This is because more current must be forced to flow through resistor 24 to avoid transistor cutoff on ripple peaks.

In practice, an output voltage of 15 volts DC can be easily obtained with an input ripple of 2 volts rms on a main voltage supply input in the range of 22 to 32 volts DC. Component values used in a working embodiment of applicants circuit as shown in FIG. 1 for providing approximately 15 to 16 volt DC 0-800 ma. regulated output, are as follows:

Resistor 12-470 ohms Zener diode 13-20 volts 1N968-B Capacitor 14-100 microfarads NPN transistor 15-2N3054 NPN transistor 17-2N 1711 Resistor 18-330 ohms Capacitor 19-0022 microfarads Resistor 21-220 ohms Resistor 22-680 ohms Resistor 23-1K ohm thermistor Adjustable resistor 24-20K ohm potentiometer Capacitor 25-100 microfarads Capacitor 26-47 microfarads Referring now to the low source impedance voltage regulator 10 of FIG. 2, a regulator is shown much the same as the embodiment of FIG. 1 with duplicate components numbered the same or provided with a prime number if substantially the same, and with additional circuit components making the regulator short circuit proof as hereinafter described. This added short circuit proof circuitry includes an interconnection between the input terminals 11a and 11b, serially from terminal 11a, diodes 27 and 28 and resistor 29 with the diodes connected anodes toward the terminal 11a and cathodes toward the terminal 111;. A PNP transistor 30 is also provided with its base connected to the junction between the cathode of diode 28 and resistor 29, its collector connected to resistor 12, and its emitter connected to the connection between a relatively low Value resistor 31, also included in the input line connection from input terminal 11a and the collector of NPN transistor 15. Resistor 31 is located between the connections of the terminal 11a input line with the anode of diode 27 and the emitter of PNP transistor 30. With diodes 27 and 28 being 1N457 diodes, resistor 29 being a 3.3K ohm resistor, PNP transistor 30 being a 2N4236 transistor and resistor 31 being a 1 ohm resistor, the short circuit and burn out proof operational action with a maximum current limit even with a direct short and no fuse required is provided.

With no load current flowing the current flow through diodes 27 and 28 and the resistor 29 applies approximately 1 volt forward bias between the base and emitter of PNP transistor 30 suflicient to saturate the transistor 30 with operation of the rest of the circuit being substantially the same as has been described with respect to the embodiment of FIG. 1. However, as load current begins to flow the drop developed across the 1 ohm resistor removes bias from the PNP transistor 30 proportionately and, for example, at a load current of approximately 750 milliamps the approximate 0.75 volt drop across resistor 31 effectively reduces the current in transistor 30 to a point where the transistor 30 is just beginning to come out of its saturated state. Thereafter, further increase in the load current increases the voltage drop across resistor 31 resulting in a reduction of the base voltage applied to transistor 15 thereby causing the output voltage to fall. When the emitter of transistor 15 is directly short circuited the output voltage obviously drops to zero and the load current is limited to a maximum of approximately 800 milliamps through the entire circuit. Please note that the load current at which the circuit cuts off can be varied by changing the value of resistor 31. It should be realized further that while both embodiments shown are positive voltage regulators connected to a positive main voltage supply they could 'be made to regulate a negative voltage from a negative main voltage supply by changing the 'NPN transistors to PNP transistors and reversing the Zener diode. With respect to the embodiment of FIG. 2, the diodes 27 and 28 would also have to be reversed and the PNP transistor changed to an NPN transistor in addition to the above called for changes.

Whereas this invention is here illustrated and described with respect to specific embodiments thereof, it should be realized that various changes may be made without departing from the essential contribution to the art made by the teachings hereof.

I claim:

1. A low source impedance voltage regulator having input connective means with a first side and a second side for connection to a main DC voltage supply; output connective means with a first side and a second side; resistive means and a Zener diode series connected across said input connective means; a first multielement solid state device having a first element connected to the first side of said input connective means; a second element connected to a second multielement solid state device, and a third element connected to the first side of said output connective means; said second multielement solid state device having a first element connected to the second element of said first multielement solid state device, a second element, and a third element connected to the second side of said input connective means and to an interconnection between said input connective means and the second side of said output connective means; the junction between said resistive means and said Zener diode being connected to the connection between said first and second multielement solid state devices; a voltage bias circuit with resistive means interconnecting said second and third elements of said second multielement device and having a resistive arm extension connected to said third element of said first multielement solid state device; wherein said resistive arm extension of said voltage bias circuit is a portion of signal feedback connective means from the third element of said first multielement solid state device and from the first side of said output connective means to the I second element of said multielement solid state device; wherein said signal feedback connective means also includes an AC signal coupling capacitor connected in parallel with said resistive arm extension of said voltage bias circuit and directly to both said third element of said first multielement solid state device on one side of the capacitor and on the other side of the capacitor directly to said second element of said second multielement solid state device; wherein said multielement solid state devices are transistors with each said first element being a collector, each said second element a base, and each said third element an emitter; and wherein a third transistor having an emitter, base, and collector is also included in the circuit along with voltage dividing circuit means connected across said input connective means and having a voltage divided tap connected to the base of said third transistor; a resistor is included between the first side of said input connective means and the collector of said first transistor; the emitter of said third transistor is connected to the junction of said resistor and the collector of said first transistor; and the collector of said third transistor is connected to said resistive means connected in series with said Zener diode.

2. The low source impedance voltage regulator of claim 1, wherein the voltage dividing circuit means connected across said input connective means includes diode means series connected with resistive means; and the voltage divided tap connection is from the connection between said diode means and the resistive means series connected there with across said input connective means to the base of said third transistor.

References Cited UNITED STATES PATENTS F J D MILLER, Primary Examiner v) A. D. PELLINEN, Assistant Examiner US. Cl. X.R. 32322, 38, 39 

